VeCS Principles


VeCS is based on the creation of slots to form multiple vertical connections on a denser area that is possible with current circuit board technology. The problem with bringing holes


The slots can be either through, blind or buried and can even be combined with Mircovias if required.


VeCS uses standard printed circuit board techniques to avoid capital imvestments and qualification of new processes.


The basic VeCS element is shown in 3D in the figure below. We call this the VeCS-1 element. Later we will show the possibilities of the Hybrid blind construction called VeCS-2.

The copper coloured areas are the vertcial traces running into the circuit board and are seperated using a second slot or hole. This creates a direct barrier for electron migration (CAF) between adjacent vertical traces as there is no path anymore available for the electron to travel. Depending on the sizes that can be achieved for the second caviety and positional accuracy traces can be as close as less then 0,1mm side to side. This is something not achievable by any other technology used today.



Process flow 


Following steps show the process step to manufacture VeCS.  Depending of equipment and set-up of a substrate/PCB factory this can be modified to your specific situation.






Plating of blind structures


After cleaning and inspection of the slots and holes you can use the standard plating proces as you do today.

The advantage of the slots is that the fluid exchange in the slots is much better then in a small hole. Aspect Ratio issues are with VeCS-1 and VeCS-2 not a problem as fluid exchange is high in the cavities.




Materials and stackups


All known material used in the circuit board and semi-conductor packages can be used with VeCS. Dielectric and copper thicknesses as used in the inductry can be used. Not like Anylayer technology that is limited by the laserdrilling and plating process to limited thicknesses.